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june 2016 docid029197 rev 1 1/12 1 UM2048 user manual dsi to hdmi adapter board for stm32 development tools introduction the dsi to hdmi adapter board (order code b-lcdad-hdmi1) provides dsi input port and hdmi output port. it can be used on stm32 evaluation boards or discovery boards, to demonstrate video solutions based on stm32 mcus. thanks to the bridge chip adv7533, the dsi to hdmi adapter board can support 2-, 3- or 4-lanes dsi video input data, s/pdif, 2-channels i 2 s audio input data and hdmi v1.3 output port. the b-lcdad-hdmi1 adapter board has the following features: ? up to four lanes of mipi/dsi data, each running up to 800 mbps (video mode only: non- burst mode with synchronization pulse) ? 2-channels i 2 s transmit stereo up to 192 khz sampling rate ? s/pdif carries stereo lpcm audio or compressed audio ? hdmi output connector: ? support of video resolutions with pixel clocks up to 80 mhz ? support of cec signals, 5 v-tolerant i 2 c and hpd i/os ? common-mode filters with esd protection figure 1. dsi to hdmi adapter board front side back side pictures not contractual www.st.com
contents UM2048 2/12 docid029197 rev 1 contents 1 hardware layout and configurat ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 video and audio input connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 video input (mipi dsi) signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 audio input (s/pdif & i 2 s) signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 control signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 hdmi output connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 cec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
docid029197 rev 1 3/12 UM2048 list of tables 3 list of tables table 1. video and audio input connector cn1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. hdmi output connector cn2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. cec source connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
list of figures UM2048 4/12 docid029197 rev 1 list of figures figure 1. dsi to hdmi adapter board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. hardware block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. dsi to hdmi adapter board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
docid029197 rev 1 5/12 UM2048 hardware layout and configuration 11 1 hardware layout and configuration dsi to hdmi adapter board is designed around the adv7533. figure 2 illustrates the connections on dsi to hdmi adapter board and figure 3 will help to locate these features on the actual evaluation board. figure 2. hardwa re block diagram figure 3. dsi to hdmi adapter board layout $xglrvljqdov &rqwurovljqdov +'0,vljqdov +'0,&deoh '6,wr+'0, eulgjhfkls 0rwkhuerdug 0lfurfrqwuroohu +'0,frqqhfwru '6,wr+'0,dgdswhuerdug '6,9lghrvljqdov ' ' 0rwkhuerdugfrqqhfwru 06y9
video and audio input connector UM2048 6/12 docid029197 rev 1 2 video and audio input connector a male high speed connector cn1 on botto m side is used to implement dsi to hdmi adapter board on mother board. the 4-lane dsi video signals, audio (i 2 s or s/pdif) signals, cec signals and control signals (i 2 c bus, reset and interrupt signals) are on this connector. table 1 shows the pinout of cn1. table 1. video and audio input connector cn1 pin number description interface pin number description interface 1gnd - 2 - - 3 dsi_ck_p dsi 4 int interrupt output 5 dsi_ck_n dsi 6 gnd - 7 gnd - 8 dsi_d2_p dsi 9 dsi_d0_p dsi 10 dsi_d2_n dsi 11 dsi_d0_n dsi 12 gnd - 13 gnd - 14 dsi_d3_p dsi 15 dsi_d1_p dsi 16 dsi_d3_n dsi 17 dsi_d1_n dsi 18 - - 19 gnd - 20 - - 21 +5 v - 22 - - 23 +5 v - 24 - - 25 - - 26 - - 27 - - 28 - - 29 - - 30 - - 31 - - 32 - - 33 - - 34 - - 35 sclk/mclk audio 36 3.3 v 37 lrclk audio 38 - - 39 i2s/spdif audio 40 i2c_sda i2c 41 - - 42 - - 43 - - 44 i2c_scl i2c 45 cec_clk cec 46 - - 47 cec cec 48 - - 49 - - 50 - - 51 - - 52 - - 53 - - 54 - - 55 - - 56 - - 57 reset reset input 58 - - 59 - - 60 1.8v -
docid029197 rev 1 7/12 UM2048 video and audio input connector 11 2.1 video input (mipi dsi) signals 4-lane mipi dsi signals are connected on ds i to hdmi adapter board as video input interface. this board supports 2-, 3- or 4-lane dsi video input data and each running up to 800 mbps. dsi interface is compatible wit h dphy v.0.90 and dsi v.1.02 and supports inputs of 16-bit rgb 4:4:4, 24-bit rgb 4: 4:4 and 30-bit rgb 4:4:4. 2.2 audio input (s/pdif & i 2 s) signals s/pdif or i 2 s audio input interface is implemented on cn1. dsi to hdmi adapter board supports standard s/pdif for stereo lpcm or compressed audio up to 192 khz, or 2- channel uncompressed lpcm i 2 s audio up to 192 khz. 2.3 control signals i 2 c bus on cn1 serves as the serial port data i/o slave for register access. the default address is 0x7a. reset signal from mother board is connected to power down (pd) pin on adv7533. it is internal pulled up by adv7533. interrupt output signal is for mother board and it is pull up on dsi to hdmi adapter board.
hdmi output connector UM2048 8/12 docid029197 rev 1 3 hdmi output connector a standard hdmi output connector cn2 is implemented on dsi to hdmi adapter board. the output supports all video and graphics resolutions from 480i to 1080p at 30 hz. thanks to common-mode filter with esd protection parts, hdmi output connector is complies with iec 61000-4-2 level 4 standard. on cn2, i 2 c master for edid reading and hdcp operations reports hdmi events through interrupts and registers. hot plug detect signa l (hpd) indicates to the interface whether the receiver is connected. table 2 shows the pinout of cn2. table 2. hdmi output connector cn2 pin number description pin number description 1 tmds d2+ 11 gnd 2 gnd 12 tmds clock- 3 tmds d2- 13 cec 4tmds d1+14 nc 5 gnd 15 ddc_i2c_scl 6 tmds d1- 16 ddc_i2c_sda 7 tmds d0+ 17 gnd 8gnd18 hdmi_5v_source from power switch u5 9 tmds d0- 19 hpd 10 tmds clock+ - -
docid029197 rev 1 9/12 UM2048 cec 11 4 cec there are two sources of cec signal on hdmi output connector on dsi to hdmi adapter board. one source (default setting) is from adv7533 and its clock is from x1 on the board. the other source is from cn1 and mother board. some pcb reworks should be done when using the second source shown in table 3. table 3. cec source connection cec source mount remove adv7533 (default) sb10 sb5 cn1 (mother board) sb5 sb10
schematic UM2048 10/12 docid029197 rev 1 5 schematic figure 4. board schematic 11 dsi to hdmi adapter mb1232 a.1 5/20/2016 title: size: reference: date: sheet: of a4 revision: hdmi daugher board project: source +5v c20 4.7uf gnd 2 in 5 en 4 out 1 fault 3 u5 stmps2141str@54 hdmi_5v_source +5v tmds_data2+ tmds_data2- tmds_data1+ tmds_data1- tmds_data0+ tmds_data0- tmds_clock+ tmds_clock- tx2- a2 gnd c7 lrclk d3 v1p2 d4 int d5 cec d6 gnd e7 gnd f1 cec_clk d7 drx3+ g6 tx1+ a3 gnd b5 avdd b4 gnd b3 gnd b2 v3p3 b1 pd c3 hpd c4 r_ext c5 pvdd c6 drx1- f4 dvdd e4 sda e5 scl e6 gnd b6 tx0+ a5 gnd e1 dvdd e2 v1p2 e3 dvdd g1 drxc+ g2 drx0+ g3 drx1+ g4 drx2+ g5 drx2- f5 txc- b7 drx3- f6 gnd f7 tx1- a4 tx2+ a1 ddc_sda d2 drx0- f3 i2s/spdif c1 tx0- a6 ddc_scl d1 drxc- f2 sclk/mclk c2 txc+ a7 a2vdd g7 u2 adv7533bcbz-rl +3v3 i2c_sda i2c_scl int +5v connector for motherboard hssi_clk_n hssi_clk_p hssi_d0_n hssi_d0_p hssi_d1_n hssi_d1_p rst c19 100nf 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 37 37 38 38 39 39 40 40 41 41 42 42 43 43 44 44 45 45 46 46 47 47 48 48 49 49 50 50 51 51 52 52 53 53 54 54 55 55 56 56 57 57 58 58 59 59 60 60 61 61 62 62 63 63 64 64 cn1 qth-030-02-f-d-a hssi_d2_n hssi_d2_p hssi_d3_n hssi_d3_p sclk lrclk i2s cec_clk int +1v8_con c21 100nf hpd ddc_sda ddc_scl l1 10uh l3 10uh l2 10uh l4 10uh l5 10uh l6 10uh c3 10uf c9 100nf c15 100nf +3v3 c10 100nf c4 10uf +1v8 c14 100nf c5 10uf c11 100nf c6 10uf c7 10uf c12 100nf c8 10uf c13 100nf c16 100nf c17 100nf r6 10k r8 [n/a] r9 [n/a] +1v8 sb11 closed r7 27k +3v3 d1 bar18 r2 1k[1%] +3v3 cec a2 gnd b2 5v a1 scl a3 sda b3 rpu c1 gnd c2 hpd c3 u6 hdmi05-cl01f3 cec +5v c23 100nf c24 100nf vin 3 vout 2 1 tab 4 u1 ld1117s18tr c2 10uf +3v3 sb3 closed sb2 open +1v8 +1v8_con sb8 closed sb9 open sb7 open h1 note: text in italic placed on a wire doesn?t correspond to net name. it just helps to identify rapidly mcu io related to this wire. sb6 closed r1 2k r5 2k[n/a] r3 2k[n/a] r4 2k[n/a] c22 100nf sb5 open sb10 closed cec_io differential pairs 100ohm differential pairs 100ohm differential pairs 100ohm c18 100nf i2c address:0x7a c1 10uf r10 120[n/a] sb1 closed v1p2 v1p2 vdd 4 out 3 en 1 gnd 2 x1 nz2520sb-12.000000m- nsa3412d +3v3 c25 100nf r11 10k sb4 open sb13 open sb12 closed +1v8 r13 10k r12 10k 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 22 20 21 cn2 hd119f-3a09200 gnd 3 d1- 2 d1+ 1 d1+ 10 d1- 9 d2+ 4 d2- 5 d2- 6 d2+ 7 gnd 8 u3 ecmf04-4hswm10 gnd 3 d1- 2 d1+ 1 d1+ 10 d1- 9 d2+ 4 d2- 5 d2- 6 d2+ 7 gnd 8 u4 ecmf04-4hswm10
docid029197 rev 1 11/12 UM2048 revision history 11 6 revision history table 4. document revision history date revision changes 09-jun-2016 1 initial release.
UM2048 12/12 docid029197 rev 1 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics ? all rights reserved

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